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85
9152BINDCO02/10
ATA8743
"  Port B, Bit 3  RESET
/dW/PCINT11
RESET
: External Reset
 input is active low and enabled by unprogramming (1) the RSTDISBL
Fuse. Pullup is activated and output driver and digital input are deactivated when the pin is used
as the RESET
 pin.
dW: When the debugWIRE Enable (DWEN) Fuse is programmed and Lock bits are unpro-
grammed, the debugWIRE system within the target device is activated. The RESET port pin is
configured as a wire-AND (open-drain) bi-directional I/O pin with pull-up enabled and becomes
the communication gateway between target and emulator.
PCINT11: Pin Change Interrupt source 11. The PB3 pin can serve as an external interrupt
source for pin change interrupt 1.
Table 19-8 on page 85 and Table 19-9 on page 86 relate the alternate functions of Port B to the
overriding signals shown in Figure 19-5 on page 78.
Table 19-8.    Overriding Signals for Alternate Functions in PB3..PB2
Signal
Name
PB3/RESET
/dW/
PCINT11
PB2/INT0/OC0A/CKOUT/PCINT10
PUOE
RSTDISBL
 (1)
+ DEBUGWIRE_ENABLE
 (2)
1.
RSTDISBL is 1 when the Fuse is 0 (Programmed).
2.
DebugWIRE is enabled when DWEN Fuse is programmed and Lock bits are unprogrammed.
CKOUT
PUOV
1
0
DDOE
RSTDISBL
(1)
 + DEBUGWIRE_ENABLE
(2)
CKOUT
DDOV
DEBUGWIRE_ENABLE
(2)
 " debugWire
Transmit
1'b1
PVOE
RSTDISBL
(1)
 + DEBUGWIRE_ENABLE
(2)
CKOUT + OC0A enable
PVOV
0
CKOUT " System Clock + CKOUT
 " OC0A
PTOE
0
0
DIEOE
RSTDISBL
(1)
 + DEBUGWIRE_ENABLE
(2)
 +
PCINT11 " PCIE1
PCINT10 " PCIE1 + INT0
DIEOV
DEBUGWIRE_ENABLE
(2)
 + (RSTDISBL
(1)
 "
PCINT11 " PCIE1)
PCINT10 " PCIE1 + INT0
DI
dW/PCINT11 Input
INT0/PCINT10 Input
AIO
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